With advancement in the art of device miniaturization, it is now becoming possible to use a gate length of 0.1 μm or less in leading-edge, ultrahigh-speed semiconductor devices. With increase in the degree of device miniaturization, it is well known that there occurs an increase of the operational speed. On the other hand, in order to achieve such an increase of operational speed by way of device miniaturization, there is a requirement, from scaling law, to reduce the thickness of a gate insulation film used therein in proportion with the reduction of a gate length of the semiconductor device.
In the case of ultrafine and ultrahigh-speed semiconductor devices having the gate length of 0.1 μm or less, it is thus necessary to reduce the thickness of the gate electrode to 1-2 nm or less, provided that SiO2 is used for the material of the gate insulation film. However, the use of such an extremely thin gate insulation film inevitably causes the problem of increase of leakage current caused by the tunneling effect through the thin gate insulation film.
Thus, in order to avoid the foregoing problem associated with the use of the SiO2 film, there is proposed in Japanese Laid-Open Patent Publication 11-87341 a process of forming a thin SiN gate insulation film on the surface of a Si substrate in place of a SiO2 gate insulation film, by first adsorbing a gaseous source material containing Si on the surface of the Si substrate, and then applying an atmosphere containing nitrogen radicals to the substrate surface on which the gaseous source material is adsorbed. According to the foregoing proposal, the physical thickness of the gate insulation film can be increased while reducing the electrical or equivalent thickness of the gate insulation film by using SiN, which has a larger specific dielectric constant than SiO2, for the gate insulation film.
This prior art process, however, is not effective for eliminating the foregoing problem of tunneling leakage current. Although SiN has a specific dielectric constant of about 8, which is certainly larger than the specific constant of 4 for SiO2, this value is not sufficient for achieving the desired increase of the physical thickness of the gate insulation film while eliminating the tunneling current.
The process of the foregoing prior art has a further drawback, in relation to the use of the nitrogen radicals, in that it requires a plasma process for exciting the nitrogen radicals. When the substrate surface is processed in the vicinity of a plasma source, charged particles forming the plasma such as electrons or ions are incorporated into the SiN film and form impurity states therein. When such impurity states are formed in the gate insulation film, the leakage current in the gate insulation film is increased and the CV characteristic is degraded. When the plasma source is provided at a remote location away from the substrate so as to avoid the foregoing problem, on the other hand, the number of the nitrogen radicals is reduced at the surface of the substrate and the adsorption of nitrogen becomes difficult.
In view of the situation noted above, there is a proposal to use a high-dielectric material such as Ta2O5 for the material of the gate insulation film. It should be noted that these high-dielectric materials have a far larger specific dielectric constant as compared with SiO2. By using such a high-dielectric material, it becomes possible to effectively reduce the equivalent thickness of the insulation film, which is an electrically equivalent thickness converted to the thickness of a SiO2 film, while simultaneously using a large physical thickness. By using such a high-dielectric gate insulation film, it becomes possible to use a physical thickness of about 10 nm for the gate insulation film of ultrafine and ultrahigh-speed semiconductor devices having a gate length of 0.1 μm or less, while successfully suppressing the gate leakage current caused by tunneling effect.
It has been known that a Ta2O5 film can be formed by a CVD process that uses Ta(OC2H5)2 and O2 as gaseous source. In a typical example, the CVD process is conducted under a reduced pressure environment at a temperature of 480° C. or more. The Ta2O5 film thus formed is then annealed in an oxidizing atmosphere for compensating for oxygen defects and for crystallization of the film. The Ta2O5 film thus crystallized shows a very large specific dielectric constant.
When growing a high-dielectric film such as Ta2O5 on a Si substrate by a CVD process, it is known that the growth of the high-dielectric film does not start immediately after the commencement of the CVD process due to a delay caused by nucleation process and that the growth starts only after a certain incubation time has elapsed.
In the experimental investigation that constitutes the foundation of the present invention, the inventor of the present invention has discovered that the incubation time varies depending on the nature of the layer on which the high-dielectric film is deposited. For example, the incubation time becomes very short when the deposition is made on a clean surface of a Si substrate from which oxide is removed. When there is an insulating film of SiO2 or a SiN or SiON on a Si substrate, on the other hand, a remarkable increase of the incubation time was observed. Further, it was discovered that the incubation time changes also depending on the thickness of the SiO2 film or SiN film or the SiON film existing on the surface of the Si substrate.
The foregoing discovery means that the thickness of the high-dielectric film formed on a SiO2 film or on a SiN film or on a SiON film on a Si substrate tends to reflect the variation of thickness of the underlying layer and that there may be a case in which the variation of the thickness of the underlying layer may be amplified by the high-dielectric film. Further, the observed fact that the thickness of the high-dielectric film thus formed by a CVD process is affected by the nature of the underlying layer indicates that the quality of the high-dielectric film thus formed for the gate insulation film may lack the desired homogeneity.
In order to suppress the occurrence of inhomogeneity in such high-dielectric film, it is necessary as well as desired to reduce the incubation time as much as possible.
Meanwhile, in such a semiconductor device that uses a high-dielectric film for the gate insulation film, it is necessary as well as desired to provide a thin oxide film between the Si substrate and the high-dielectric gate insulation film for eliminating the diffusion of metal elements or impurity elements into the substrate forming the channel region of the semiconductor device from or through the high-dielectric film. Otherwise, there may be caused a problem of carrier scattering in the channel region by the metal elements.
On the other hand, such an intervening oxide film has to be extremely thin. When a thick oxide film is interposed between the Si substrate and the high-dielectric film, the effect of the high-dielectric film would be canceled out. In addition, there is a demand for a technology to change a film quality such as composition in the thickness direction of the high-dielectric film.